1. `madvise(MADV_DONTNEED)` on the `181 MB` of source BF16 dense matrices in `mtp-q2_0.gguf` after quantizing them into `mq8_` (`90 MB` `Q8_0`) + switching `draft_vocab` from `106,299` tokens (`145 MB`) to `draft_vocab_en.bin` (`40,525` tokens, `55 MB`) saves **`271 MB` of RAM**, allowing `STRATA_METAL_ARENA_GB=6.5` (`9.9 GB` resident RSS, `-1.0 GB` lower than baseline!).
2. Capping `mtp_encode`'s local QSA sliding window to `256` cells (`4` chunks of 64 instead of `33`) and running `mtp_prefill` only on the last `256` tokens of the final prompt chunk eliminates the multi-chunk `mtp_prefill` lag on `12K–32K` prompts (`314–330 tok/s` end-to-end 2K prefill!).
3. Setting `STRATA_METAL_PREFETCH_DRAFT=0` in `stream.cpp` (`ahead()` only prefetches for root token `t=0`) and `AcceptMoE` (`arXiv:2608.02989`) draft routing in `router.metal`/`moe.metal` (`sg > 0` protects `r_prot = 1` and squares `moce_scale`) cuts speculative SSD traffic from `332 -> 177 MB/window` (`94.1%` arena hit rate!) and pushes **32K-context decode to `30.37 tok/s` (`persona_chat`), `33.44 tok/s` (`reasoning`), `34.41 tok/s` (`coding`), and `42.48 tok/s` (`prompt_2048tok_ops`, `3.26 tok/round`, `89.8%` acceptance)**!
4. **Round 5 Prefill + Decode + Scratch Aliasing + Deterministic Lookahead (`gr_norm_h_moec`, `gr_apply_moec`, `gr_norm_h4`, `gr_norm` `rv[10]`, `gr_norm_comb_4s`, `qsa_prep#qf16`, `-580 MB` Scratch Aliasing, `stream.cpp` Lookahead Fix):** Folded `mm_combine` into `gr_norm_h_moec` and `gr_apply_moec` (eliminating `47/48` `mm_combine` dispatches and `2.01 GB` DRAM traffic/chunk), added per-token 4-stream `gr_norm_h4` (`-18.3%`), skipped dead `p.mixed` FP32 writes in `gemm_hc_up` (`-11.3%`), cached `gr_norm` in registers + added 4-stream `gr_norm_comb_4s`, fused FP16 query output into `qsa_prep#qf16` (`1.98x` faster, `-8.91 ms/chunk`), aliased disjoint GDN/QSA prompt scratch buffers (**cutting `MT=2048` transient prompt scratch from `2.16 GB -> 1.58 GB`, `-770 MB` vs original `2.35 GB`**), and fixed `stream.cpp` `at_layer` to deterministically reclaim unused prompt lookahead slots.
22 unmodified lines
27. **Round 28 `mtp.fc_hidden` `[t][c]` Stream Batching (`-52.1%` at `n=2`, `-29.3%` at `n=3`, `-17.0%` at `n=4`) + `ple.metal` `tg_sum` Barrier Halving (`-1.5%..-5.8%`) + `sample.metal` `tg_argmax` Unroll & `router_route_8` (`audits/opus_r28_mtp.md`, `audits/sol_r28_router.md`, `audits/argon_r28_ple.md`):** Batched `mtp.fc_hidden.weight` across all `n * HC` streams in `[t][c]` order (`<= MAXT` rows per `gemv` dispatch in `window.cpp` & `mtp.metal`), cutting the MTP hidden branch at `n=2` (`a=2` accepted drafts) by **`-52.1%` (`211.6 -> 101.4 us`, `9 -> 3` dispatches)**, at `n=3` (`a=3` accepted drafts) by **`-29.3%` (`220.1 -> 155.7 us`, `9 -> 5` dispatches)**, and at `n=4` by **`-17.0%` (`228.9 -> 190.0 us`)** while matching `n` separate `n=1` chains bit-for-bit; halved `threadgroup_barrier`s in `ple.metal` (`2 -> 1` in `ple_gnorm`, `4 -> 2` in `ple_gate_norm`, `6 -> 3` in `ple_query_gate_norm` & `ple_comb_query_gate_norm`, `8 -> 4` per stream in `ple_moe_gate_norm` & `ple_moe_gate_norm_c`) via ping-pong `part[16]`, speeding up decode/verify PLE (`T=1..7`) by **`-1.5%..-3.7%`** and `T=64` `ple_moe_gate_norm_c` by **`-1.5%..-5.8%`** (`100%` bitwise); and added `#pragma clang loop unroll(full)` to `tg_argmax` in `sample.metal` + `router_route_8` (`T_Q8_0`) in `router.metal`.
28. **Round 29 `mm_gu3<T_IQ2_S>` Super-Block Scale Caching (`-86.24 ms` / `-10.0%` in `kprof`) & `W8<T_IQ2_XXS>` Byte Loads (`-15.42 ms` / `-6.5%` in `kprof`) + `moe_route` `e512`/`res_mask` (`-20.6%..-26.4%`) & `deq<T_IQ2_S / T_IQ2_XXS>` (`-1.1%..-6.9%`) (`audits/opus_r29_prompt.md`, `audits/sol_r29_moemm.md`, `audits/argon_r29_moe.md`):** Cached per-row FP16 super-block scales `dg[0..3]` / `du[0..3]` across the 8 `TK=32` steps per 256-element block in `mm_gu3<T_IQ2_S>` and shrank `fmt<T_IQ2_S>::TAB` from `2080` to `2048` (`16,512 -> 16,384 B` exact `16 KB` TG memory), plus direct byte loads `p[l]` / `p[l+2]` in `W8<T_IQ2_XXS>` and `fma` in `W8<T_IQ3_S>`, cutting `pg:mm_gu3_22` (`34` `T_IQ2_S` layers) in `kprof` from **`859.30 -> 773.06 ms` (`-86.24 ms` / `-10.0%` faster, `+5.48%` at `T=1024`, `+5.08%` at `T=2048` in isolated A/B)** and `pg:mm_gu3_16` (`12` `T_IQ2_XXS` layers) from **`237.28 -> 221.85 ms` (`-15.42 ms` / `-6.5%` faster)**; eliminated dynamic register indexing `v[ex / 32] = -INFINITY` in both `route_topk` (`-0.7%..-1.2%`, `5.78 -> 5.305 ms` in `kprof`) and `moe_route` (`moe.metal`), where adding `e512` + preloaded 16-bit `res_mask` from `smap` cut `moe_route` (`split=1`) by **`-26.4%` at `ntok=1`, `-24.4%` at `ntok=2`, and `-20.6%` at `ntok=4`**; and optimized decode `deq<T_IQ2_S>` (`ushort` `q2`/`s2` + pre-shifted `qh` + `#pragma clang loop unroll(full)`, **`-1.1%..-6.9%` faster** across `QUANT_CTAB=0/1`), `deq<T_IQ2_XXS>` (**`-5.1%..-5.9%` faster**), and `deq<T_IQ3_XXS>` (**`-0.7%..-2.9%` faster**).
29. **Round 30 `W4<T_Q2_0>::dec` IEEE-754 FP16 `0x6400` Exponent Trick (`-10.5%` `mm_down3` at `T=2048` / `-37.02 ms` in `kprof`) + `gdn_pre` & `gdn_post` Vector `simd_sum(float4)` Reductions (`audits/opus_r30_moemm.md`, `audits/sol_r30_prompt.md`, `audits/argon_r30_gdn.md`):** Replaced FP32 `int->float->half4` conversion in `W4<T_Q2_0>::run_q` with an IEEE-754 FP16 mantissa-OR decode (`const uint2 c = (uint2(q | (q << 14), (q >> 4) | (q << 10)) & 0x00030003u) | 0x64006400u; return (as_type<half4>(c) - 1025.0h) * d;`), proven **100% bit-for-bit identical across all `65,536 x 256 = 16,777,216` FP16 `d` x code-byte combinations**, cutting `mm_down3<T_Q2_0, 16, 64, 32, 2>` by **`-10.5%` at `T=2048` (`7,950 -> 7,113 us`), `-8.3%` at `T=1024`, and `-37.02 ms` (`312.39 -> 275.37 ms` / `-11.9%`, down `-23.9%` from Round 24's `361.9 ms`!)** in full-model `kprof`; and replaced the `12` scalar `simd_sum(float)` trees in `gdn_pre` and `4` scalar `simd_sum(float)` trees in `gdn_post` with bitwise-identical vector `simd_sum(float4)` reductions (`12 -> 3` and `4 -> 1`) + cold `t == T - 1` / `a.f32` branch hoists (`-0.66%..-1.05%` on `gdn_post`).
30. **Round 31 `mm_gu3<T_IQ2_S / T_IQ2_XXS / T_IQ2_XS / T_IQ3_S>` `tab + hh` & Sign-Shift (`-45.32 ms` `IQ2_S` / `-12.56 ms` `IQ2_XXS` in `kprof`) + `moe_down` / `gemv` `Q2_0R` `0x6400` Half-Mantissa Decode (`-7.6%..-16.9%`) + `dq_f16<T_IQ4_XS / T_IQ4_NL>` Register Table Init & `perm == 4` Contiguous Writes (`audits/opus_r31_moemm.md`, `audits/sol_r31_moe.md`, `audits/argon_r31_dq.md`):** Hoisted invariant `hh = (kl >> 2) & 1` and `th = tab + hh` across `mm_gu3`, replaced the divergent `hh ? s >> 4 : s` ternary in `W8<T_IQ2_S>` and `W8<T_IQ3_S>` with `s >> (4 * hh)`, and extended 256-wide super-block scale caching `dg[]`/`du[]` to `T_IQ2_XXS` and `T_IQ2_XS`, speeding up `mm_gu3<T_IQ2_S>` by **`+8.17%..+12.79%`** (`773.06 -> 727.74 ms` in `kprof`, `-131.56 ms` / `-15.3%` faster than Round 28!), `mm_gu3<T_IQ2_XXS>` by **`+4.08%..+6.86%`** (`221.85 -> 209.29 ms` in `kprof`), `mm_gu3<T_IQ2_XS>` by **`+1.41%..+6.16%`**, and `mm_gu3<T_IQ3_S>` by **`+2.23%..+6.84%`** (`100%` bitwise `PASS`); replaced scalar `float((pk >> ...) & 3) - 1.0f` decode in `q2_combine<T_Q2_0R>` (`moe.metal`) and `gemv_q2_raw_combine` (`gemv.metal`) with packed IEEE-754 FP16 `0x64006400u` mantissa-OR decode, cutting decode `moe_down` (`dn`, all 48 layers!) by **`-7.6%..-16.9%` (`ratio 0.8311..0.9236` across `NE=1..4` and `ntok=1..8`)** and `gemv` `Q2_0R` (`ntok=1`) by **`-11.8%`** (`100%` bitwise `PASS`); and replaced the dynamic `load_tab<T_IQ4_NL>` loop and divergent `constant`-memory `kvalues_iq4nl` reads in `dq_f16<T_IQ4_XS / T_IQ4_NL>` (`dense_mm.metal`) with 4 bank-conflict-free register stores, guarded `a.perm`, and inverted `ro = gid.y` for `perm == 4` (`1.03x–1.05x` on `320x10240p4`, `100%` bitwise `PASS`).
31. **Round 32 `qsa_flash` `sp[4][HPG * QCH]` `3 -> 1` Barrier & Pre-Added `ko[j]` + Loop Unrolling (`-4.03%..-5.47%` / `-6.10 ms` in `kprof`) + `mm_gu3<T_IQ2_S>` `half4` Coalesced `HS` Store (`-9.00 ms` in `kprof`) + Decode `deq` 64-Bit `uint2` Grid Loads & `deq_iq_packed` (`audits/opus_r32_moemm.md`, `audits/sol_r32_qsa.md`, `audits/argon_r32_moe.md`):** Expanded `sp[2][HPG * QCH]` to `sp[4][HPG * QCH]` (`13,760 < 16,384` bytes TG memory) in `qsa_flash` (`qsa_prompt.metal`) so all 4 simdgroups store `S` partials simultaneously across 1 `threadgroup_barrier` instead of 3 (`-64` barriers/token at `pos0 >= 2048`), pre-added `d0 + kl` to `ko[j]` for constant-offset `+0/+16/+32/+48` `K` loads, and unrolled fixed-trip loops, winning **`7/7` pairs at every position on the quiet GPU (`-4.31%` at `pos0=0`, `-5.47%` at `pos0=2048`, `-4.03%` at `pos0=8192`, `-0.80%` at `pos0=30000`, and `130.50 -> 124.40 ms` / `-4.7%` in full-model `kprof`!)**; enabled the `half4` coalesced `HS` store epilogue in `mm_gu3` (`moe_mm.metal`) for `T_IQ2_S`, cutting `pg:mm_gu3_22` (`34` layers) by another **`-9.00 ms` (`727.74 -> 718.74 ms` in `kprof`, `-140.56 ms` / `-16.4%` faster than Round 28, and pushing `T=2048` under `25,000 us` to `24,986.6 us`!)**; and replaced pair 32-bit grid loads in `deq<T_IQ2_XXS / T_IQ2_XS / T_IQ2_S>` (`quant.metal`) with 64-bit `uint2` loads (`4 -> 2` loads per unit), unrolled `deq<T_IQ3_S>` (`-2.7%..-6.6%` faster `IQ3_S` `moe_gu`), and added low-register 6-VGPR `deq_iq_packed<F>` + `iq_combine` (`-9.4%..-15.8%` at `NR=1, NE=4` in `moe.metal`).