# Round 34 Track C Audit: `mm_gu3` `T_IQ3_S` & Super-Block / Loop-Invariant Hoisting on M5

## 1. Executive Summary
- **Patch**: `/tmp/argon_r34_moemm/argon_r34_moemm.patch` (`git -C vendor/strata apply --check` passes with exit code `0`).
- **Bitwise Parity**: 100% bitwise identical (`HS_memcmp=PASS YE_memcmp=PASS Y_memcmp=PASS`) across `T_IQ3_S`, `T_IQ2_S`, `T_IQ2_XXS`, and `T_IQ2_XS` at `T = 512, 1024, 2048`.
- **Key Architectural Finding (M5 Cooperative Matrix VGPR Cliff in `mm_gu3`)**:
  - In `mm_gu3`, each SIMD lane simultaneously holds two FP32 destination cooperative tensors (`accg`, `accu`: `2 x 16 = 32` 32-bit registers) plus the FP16 right-input cooperative tensor (`rw`: `32` halves = `16` 32-bit registers) across `op.run(tA, rw, accg)` and `op.run(tA, rw, accu)`.
  - At `TM=16, TN=32, TK=32, SG=4` (`128` threads/threadgroup), `mm_gu3` sits at the exact M5 VGPR occupancy cliff:
    1. Adding `F == T_IQ3_S` to `sb` (caching `float dg[4], du[4]` = 8 extra 32-bit VGPRs live across all 8 `ki` steps and 16 `op.run` calls) or even `half dg[4], du[4]` spills/drops occupancy, regressing `T_IQ3_S` by `+1.55%` to `+5.39%`.
    2. Similarly, hoisting `l = kl >> 3`, `sh0`, `sh1`, `sh`, `th`, or per-lane `g0_l`/`u0_l` pointer increments across `op.run` extends their live ranges across the matrix accumulate instructions, regressing `T_IQ2_S` (`+13.8%` to `+67.3%`) and `T_IQ2_XXS` (`+25.2%` to `+28.8%`). Recomputing `l` and shifts inside `W8<F>::block` allows those temporaries to die before `op.run`.
- **What Shipped (Proven Net Wins with Zero Occupancy Penalty)**:
  1. **`W8<T_IQ3_S>::block` + `F == T_IQ3_S` Vectorized `half4` Epilogue Store**:
     - Added `W8<T_IQ3_S>::block(bl, k, d, tab, hh, a, b)` and dispatched it in `mm_gu3` with inline `rdh(rgw)` / `rdh(ruw)` and the already-live `hh` (zero extra registers live across `op.run`), eliminating redundant `row + (j_in >> 8) * 110`, `(k & 255)` masks, and `(k & 7) >> 2` recomputations on every inner-loop step.
     - Added `F == T_IQ3_S` to `mm_gu3`'s vectorized `*(device half4*)hs_p` epilogue store (line 1028), which executes after the K loop when `rw` and `accu` are dead.
  2. **`F == T_IQ2_XS` Super-Block Offset (`sboff`) Reuse**:
     - Unlike `T_IQ2_S` and `T_IQ2_XXS`, `W8<T_IQ2_XS>::block` has a lower internal register footprint (no `l` or `qh` temporaries), leaving headroom to reuse `sboff = uint(kb >> 8) * fmt<F>::BB` across the `dg`/`du` preload and all 8 `ki` steps (`const uint boff = F == T_IQ2_XS ? sboff : ...`).
  3. **`gdn_prompt.metal` Check**:
     - Verified `gdn_prompt_parity --ab` at `T = 2048` (`f32 = 0`); `gdn_pre` (`47.32 ms`), `gdn_scanr_4` (`187.46 ms`), and `gdn_post` (`34.93 ms`) are already at their register optimum (`268.76 ms` total across 36 layers), so `gdn_prompt.metal` was left untouched.

## 2. Quiet-GPU A/B Benchmark Results (`moe_mm_parity --v3 --dn Q2_0 --tile 16,32,32,4 --dtile 64,32,2 --gu-bench`)

| Format | `T` | Bitwise Parity (`HS / YE / Y`) | Baseline Med (Min) `us` | Candidate Med (Min) `us` | Med Diff | Min Diff |
|---|---:|---|---:|---:|---:|---:|
| `IQ3_S` | 512 | `PASS / PASS / PASS` | `9864.6` (`9814.7`) | `9844.9` (`9797.7`) | **-0.20%** | **-0.17%** |
| `IQ3_S` | 1024 | `PASS / PASS / PASS` | `16247.3` (`16210.3`) | `16144.0` (`16134.4`) | **-0.64%** | **-0.47%** |
| `IQ3_S` | 2048 | `PASS / PASS / PASS` | `27632.6` (`27613.1`) | `27535.3` (`27490.0`) | **-0.35%** | **-0.45%** |
| `IQ2_XS` | 512 | `PASS / PASS / PASS` | `7726.8` (`7696.6`) | `7728.9` (`7698.7`) | +0.03% | +0.03% |
| `IQ2_XS` | 1024 | `PASS / PASS / PASS` | `12758.6` (`12377.6`) | `12670.6` (`12271.4`) | **-0.69%** | **-0.86%** |
| `IQ2_XS` | 2048 | `PASS / PASS / PASS` | `22241.0` (`21177.6`) | `21962.3` (`20952.1`) | **-1.25%** | **-1.06%** |
| `IQ2_S` | 512 | `PASS / PASS / PASS` | `8846.8` (`8797.6`) | `8866.7` (`8796.8`) | +0.22% | **-0.01%** |
| `IQ2_S` | 1024 | `PASS / PASS / PASS` | `14642.3` (`14624.9`) | `14644.5` (`14629.9`) | +0.02% | +0.03% |
| `IQ2_S` | 2048 | `PASS / PASS / PASS` | `25110.4` (`25040.7`) | `25114.6` (`25019.1`) | +0.02% | **-0.09%** |
| `IQ2_XXS` | 512 | `PASS / PASS / PASS` | `7530.3` (`7521.9`) | `7543.7` (`7518.6`) | +0.18% | **-0.04%** |
| `IQ2_XXS` | 1024 | `PASS / PASS / PASS` | `12481.9` (`12457.5`) | `12493.6` (`12471.8`) | +0.09% | +0.11% |
| `IQ2_XXS` | 2048 | `PASS / PASS / PASS` | `21520.8` (`21184.5`) | `21586.4` (`21177.1`) | +0.30% | **-0.03%** |